1. Field of the Invention
The present invention relates to a silicide semiconductor structure. More specifically, the present invention relates to a cobalt silicide structure for use in processes having a minimum line width less than 0.25 microns.
2. Discussion of Related Art
As semiconductor processing techniques improve, the minimum feature size that can be produced by a semiconductor process decreases. Semiconductor processes are typically defined by minimum feature size (i.e., 0.5 micron process, 0.35 micron process, 0.25 micron process, 0.18 micron process). As the minimum feature size of semiconductor processes decreases, so does the width of the conductive elements formed by the process. As a result, the resistances of the conductive structures undesirably increase.
One example of a conductive element is a metal silicide structure, which is fabricated by reacting silicon with a refractory metal. Semiconductor processes having a minimum feature size of 0.25 microns or greater typically use titanium silicide (TiSi.sub.2). A titanium silicide structure is typically formed by depositing a layer of titanium over a layer of polycrystalline silicon and annealing the resulting structure. Titanium can be deposited over the polysilicon layer, even if there is a native oxide layer over the upper surface of the polysilicon layer, because the titanium will getter (i.e., remove) the native oxide layer. However, as the minimum feature size decreases below 0.25 microns, it becomes increasingly more difficult to maintain the low resistance of titanium silicide. Consequently, other elements have been used to replace the titanium.
One such element is cobalt. However, while cobalt silicide has a lower resistivity than titanium silicide when formed on small geometries, there are several problems associated with the use of cobalt to form a metal silicide structure. First, cobalt is incapable of gettering oxygen in the same manner as titanium. As a result, the upper surface of a polysilicon layer must be thoroughly cleaned prior to depositing cobalt. This cleaning adds to the complexity of the process. Any oxide left on top of the polysilicon layer can cause problems. For example, the cobalt can migrate to the areas where the native oxide does not exist, thereby resulting in the formation of cobalt silicide spikes that extend through the polysilicon layer to underlying gate oxide or silicon. If the cobalt silicide spikes reach an underlying gate oxide layer, undue stress is placed on the gate oxide layer, thereby causing the gate oxide to fail. If the cobalt silicide spikes reach an underlying silicon substrate, a short will exist between the metal silicide structure and the underlying substrate, thereby resulting in excessive leakage current. A thin titanium layer has been proposed between the cobalt layer and the polysilicon layer. (See, M. Lawrence, A. Dass, D. B. Fraser and C. S. Wei, "Growth of epitaxial CoSi.sub.2 on (100) Si", Appl. Phys. Lett., 58, pp. 1308-1310 (1991).
In addition, when the cobalt and polysilicon layer are annealed in the presence of oxygen, it is possible for the ambient oxygen to diffuse through the cobalt to the cobalt-polysilicon interface. Under these conditions, silicon oxide can be formed at the cobalt-polysilicon interface. The presence of silicon oxide at the cobalt-polysilicon interface can cause the same problems caused by the presence of native oxide on the upper surface of the polysilicon layer. Some conventional processes provide for a capping layer over the cobalt layer to prevent ambient oxygen from diffusing through the cobalt layer to the cobalt-polysilicon interface. One such process is described in U.S. Pat. No. 5,384,285 to Sitaram et al.
It would therefore be desirable to have a method for forming a cobalt silicide structure that solves the above-described problems.